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type ordering code package tle 4473 gv55 q67007-a9647 p-dso-12-6 dual low drop voltage regulator tle 4473 gv55 p-dso-12-2, -3, -6 data sheet 1 rev. 1.2, 2004-01-01 features ? stand-by output 190 ma; 5 v 2% main output: 300 ma, 5 v tracked to the stand-by output low quiescent current consumption disable function separately for both outputs wide operation range: up to 42 v very low dropout voltage 2 independent reset circuits watchdog output protected against short circuit wide temperature range: -40 c to 150 c overtemperature protection overload protection functional description the tle 4473 is a monolithic integrated voltage regulator with two very low drop outputs, a main output q1 for loads up to 300 ma and a stand by output q2 providing a maximum of 190 ma. the stand-by regulator transforms an input voltage v i in the range of 5.6 v v i 42 v to v q2 = 5.0 v ( 2%) output voltage. the main output is tracked to the stand by output voltage and provides also 5 v. versions of the device with 5 v/3.3 v and 5 v/2.6 v are available, please refer to the data sheet tle 4473 g v53/tle 4473 g v52. two inhibit pins allow to use either both output voltages or to disable only q1 or to switch off both outputs, the latter causing the current consumption to drop below 1 a. the tle 4473 is designed to supply microprocessor systems and sensors under the severe conditions of automotive applications and is therefore equipped with additional protection functions against overload, short circuit and overtemperature. the device operates in the wide junction temperature range of -40 c to 150 c.
data sheet 2 rev. 1.2, 2004-01-01 tle 4473 gv55 the device features a reset with adjustable power on delay for each of the outputs. in addition the output for the microcontroller supply comes up with a watchdog in order to supervise a connected microcontroller reset and watchdog behavior the reset output ro2 is in high-state if the voltage on the delay capacitor c d2 is greater or equal v du2 . the delay capacitor c d2 is charged with the current i dc2 for output voltages greater than the reset threshold v rt2 . if the output voltage gets lower than v rt2 (?reset condition?) a fast discharge of the delay capacitor c d2 sets in and as soon as v d2 gets lower than v dl2 the reset output ro2 is set to low-level. the time for the delay capacitor charge is the reset delay time. for the power-on case the charging process of c d2 starts from 0 v, which leads to the equation: (1) for the power-on reset delay time. when the voltage on the delay capacitor has reached v du2 and reset was set to high, the watchdog circuit is enabled and discharges c d2 with the constant current i dd2 . if there is no rising edge observed at the watchdog input, c d2 will be discharge down to v dl2 . then reset output ro2 will be set to low and c d2 will be charged again with the current i dc2 until v d2 reaches v du2 and reset will be set high again. if the watchdog pulse (rising edge at watchdog input wi) occurs during the discharge period c d2 is charged again and the reset output stays high. after v d2 has reached v du2 , the periodical cycle starts again. the watchdog timing is shown in figure 1 . the maximum duration between two watchdog pulses corresponds to the minimum watchdog trigger time t wi,tr . higher capacitances on pin d2 result in longer watchdog trigger times: (2) if the output voltage q1 decreases below v rt1 (typ. 4.65 v), the external capacitor c d1 is discharged by the reset generator of the main output. if the voltage on this capacitor drops below v dl1 , a reset signal is generated on pin 2 (ro1). if the output voltage rises above the reset threshold, c d1 will be charged with the constant current i dc1 . after the power-on-reset time the voltage on the capacitor reaches v du1 and the reset output will be set high again. the value of the power-on-reset time can be set within a wide range depending of the capacitance of c d1 using the above given equation (1) analogous for q1. t don , c d2 v du2 i dc2 ---------------------------- - = t wi,tr max 0.34 ms/nf c d2 =
tle 4473 gv55 data sheet 3 rev. 1.2, 2004-01-01 figure 1 watchdog timing schedule aed03099_4473 w v v v q d2 v v ro2 v du2 - v dl2 () ( dc2 + dd2 ) dc2 x dd2 t wd, p = wd, l t wd, p t wi, tr t wd, l t = v v ( du2 - dl2 ) dc2 t = v v ( du2 - dl2 ) dd2 du2 v v dl2 wi, tr c d2 ; ; d2 c d2 c t t t t t
data sheet 4 rev. 1.2, 2004-01-01 tle 4473 gv55 figure 2 block diagram (tle 4473 gv55) with typical external components tle 4473 gv55 aea03298.vsd current and saturation control, overcurrent protection overtemperature shutdown bandgap reference inhibit reset generator watchdog current and saturation control, overcurrent protection inhibit reset generator gnd 10 f 4.7 k ? 4 3 q2 ro2 c supply c reset 1 wi watchdog (from c) 100 nf 11 d2 2 ro1 5 q1 10 f 4.7 k ? e.g. sensor supply e.g. sensor reset (to c) inh1 8 c inh2 9 ignition i 7 v bat c i 100 nf 6, 12 100 nf 10 d1
tle 4473 gv55 data sheet 5 rev. 1.2, 2004-01-01 application information the output voltage is divided by a voltage divider and compared to an internal reference voltage. a regulation loop controls the q2 output in order to achieve a stable output voltage at the q2 pin. a second regulation loop controls the q1 output. the reference voltage for the q1 is the regulated q2 potential (tracking regulator). figure 2 includes the components needed for a typical application. maintaining the stability of the regulation loops requires a capacitor of 10 f both outputs. a maximum esr of 5 ? is permissible for the q2 output, while the q1 output requires a capacitor with a maximum esr of 3 ? . for both output blocking capacitors it is recommended to use tantalum types in order to stay in the permissible esr range over the full operating temperature range. at the input of the regulator a capacitor is necessary for compensating line influences. a minimum of 100 nf (ceramic capacitor) is recommended. in addition for compensation of long input lines of several meters an electrolytic input capacitor of 47 f ? 220 f should be placed at the input. figure 3 pin configuration (top view) aep03318.vsd 1 wi 2 ro1 3 ro2 12 11 10 d2 d1 4 q2 5 q1 6 n.c. 9 8 7 inh2 inh1 i gnd tle 4473 (p-dso-12-6) pin 6 and heat slug should be connected to gnd
data sheet 6 rev. 1.2, 2004-01-01 tle 4473 gv55 table 1 pin definitions and functions pin no. symbol function 1wi watchdog input; input for watchdog pulses, positive edge triggered 2ro1 reset and watchdog output for q1; open collector output 3ro2 reset output 2; open collector output 4q2 stand-by regulator output voltage; block to gnd with a capacitor c q2 10 f, esr < 5 ? at 10 khz 5q1 main regulator output voltage; output voltage tracked to q2 voltage; block to gnd with a capacitor c q1 10 f, esr < 3 ? at 10 khz 6n.c. not connected; connect to gnd 7i input voltage; block to ground directly at the ic with a ceramic capacitor 8 inh1 inhibit input 1; low level disables q1, integrated pull-down resistor 9 inh2 inhibit input 2; low level at inh2 and inh1 disables q2 and q1, integrated pull-down resistor 10 d1 reset delay 1; connect to ground via a capacitor to set reset delay for q1 11 d2 reset delay 2; connect to ground via a capacitor to set reset delay and watchdog timing for q2 12 gnd ground
tle 4473 gv55 data sheet 7 rev. 1.2, 2004-01-01 table 2 absolute maximum ratings -40 c < t j < 150 c parameter symbol limit values unit remarks min. max. input i voltage v i -42 45 v ? current i i ?? ma internally limited stand-by output q2 voltage v q2 -0.3 18 v ? current i q2 ?? ma internally limited main output q1 voltage v q1 -0.3 18 v ? current i q1 ?? ma internally limited inhibit input inh1 voltage v inh1 -42 45 v ? current i inh1 -2 2 ma ? inhibit input inh2 voltage v inh2 -42 45 v ? current i inh2 -2 2 ma ? reset output ro1 voltage v ro1 -0.3 18 v ? current i ro1 ?? ma internally limited reset output ro2 voltage v ro2 -0.3 18 v ? current i ro2 ? ? ma internally limited reset delay d1 voltage v d1 -0.3 7 v ? current i d1 -5 5 ma ? reset delay d2 voltage v d -0.3 7 v ? current i d -5 5 ma ?
data sheet 8 rev. 1.2, 2004-01-01 tle 4473 gv55 note: in the operating range the functions given in the circuit description are fulfilled. integrated protection functions are designed to prevent ic destruction under fault conditions. protection functions are not designed for continuous repetitive operation. watchdog input wi voltage v radj -0.3 7 v ? current i radj -5 5 ma ? temperatures junction temperature t j -50 150 c ? storage temperature t stg -50 150 c ? table 3 operating range parameter symbol limit values unit remarks min. max. input voltage v i 5.6 42 v ? junction temperature t j -40 150 c ? thermal resistances p-dso-12-6 junction pin r thj-pin ? 4k/w ? junction ambient r thj-a ? 115 k/w pcb heat sink area 0 mm 2 1) 1) package mounted on pcb 80 80 1.5 mm 3 ; 35 cu; 5 sn; zero airflow. junction ambient r thj-a ? 100 k/w pcb heat sink area 100 mm 2 1) junction ambient r thj-a ? 60 k/w pcb heat sink area 300 mm 2 1) junction ambient r thj-a ? 48 k/w pcb heat sink area 600 mm 2 1) table 2 absolute maximum ratings (cont ? d) -40 c < t j < 150 c parameter symbol limit values unit remarks min. max.
tle 4473 gv55 data sheet 9 rev. 1.2, 2004-01-01 table 4 electrical characteristics v i1 = 13.5 v; v inh1 = v inh2 = 5 v; -40 c < t j < 150 c; unless otherwise specified parameter symbol limit values unit test condition min. typ. max. stand-by regulator output q2 output voltage v q2 4.90 5.0 5.10 v 1 ma < i q2 < 190 ma; 6 v < v i < 28 v output current limitation i q2 200 300 550 ma v q2 = 4.5 v output drop voltage; v drq1 = v i1 - v q1 v drq2 ? 200 600 mv i q2 = 100 ma 1) load regulation ? v q2,lo ? 15 50 mv 1 ma < i q2 < 200 ma line regulation ? v q2,li ? 520mv i q2 = 1 ma; 6 v < v i < 28 v power supply ripple rejection psrr ? 65 ? db f r = 100 hz; v r = 1 vpp current consumption quiescent current; stand-by i q = i i - i q2 i q ? 170 220 a i q2 = 500 a; t j = 25 c; v inh1 < v inh1 off (q1 off) ?? 245 a i q2 = 500 a; t j = 85 c; v inh1 < v inh1 off (q1 off) ?? 280 a i q2 = 500 a; v inh1 < v inh1 off (q1 off) ? 4.5 5 ma i q2 = 100 ma; v inh1 < v inh1 off (q1 off) quiescent current; inhibited i q ? 0.1 1 a v inh1 = v inh2 = 0 v; t j < 85 c ? 0.1 15 a v inh1 = v inh2 = 0 v
data sheet 10 rev. 1.2, 2004-01-01 tle 4473 gv55 inhibit input inh2 turn-on voltage v inh2 on ?? 2.3 v v q2 on turn-off voltage v inh2 off 0.65 ?? v v q2 off h-input current i inh2 on -1 3.2 6 a v inh2 = 5.0 v (see page 13 ) l-input current i inh2 off -1 0.1 1 a0 v < v inh2 < 0.8 v watchdog and reset timing d2 charge current i dc2 6.5 9.0 12.5 a v d2 = 1 v discharge current i dd2 2.0 3.5 5.0 a v d2 = 1 v upper timing threshold v du2 1.5 1.85 2.4 v ? lower timing threshold v dl2 0.30.40.5v ? saturation voltage v d2,sat ?? 100 mv v q2 < v rt2 watchdog trigger time t wi,tr 34 42 51 ms c d2 = 100 nf reset delay time t rd2 15 20 25 ms c d2 = 100 nf reset reaction time t rr ?? 5.0 s c d2 = 100 nf reset output ro2 reset switching threshold v rt2 4.5 4.65 4.8 v ? v rt2 / v q2 90 93 96 % ? reset threshold headroom v r2head 200 350 500 mv v q2 - v rt2 reset output current i ro2 ?? 1.6 ma v q2 = 5 v, v d2 = 0 v; v ro2 = 0.3 v reset output low voltage v ro2l ? 0.15 0.3 v v q2 1 v reset high voltage v ro2h 4.5 ?? v r ro2,ext = 4.7 k ? table 4 electrical characteristics (cont ? d) v i1 = 13.5 v; v inh1 = v inh2 = 5 v; -40 c < t j < 150 c; unless otherwise specified parameter symbol limit values unit test condition min. typ. max.
tle 4473 gv55 data sheet 11 rev. 1.2, 2004-01-01 main (tracked) regulator output q1 output voltage v q1 4.875 5.0 5.125 v 1 ma < i q1 < 200 ma; 6 v < v i < 28 v output voltage tracking accuracy ? v q = v q2 - v q1 -25 5 25 mv 1 ma < i q1 < 200 ma; 6 v < v i < 28 v output voltage tracking accuracy ? v q = v q2 - v q1 -25 5 25 mv 1 ma < i q1 < 300 ma; 8 v < v i < 28 v output current limitation i q1 350 500 ? ma v q1 = 4.5 v output drop voltage v drq1 = v i - v q1 v drq1 ? 300 600 mv i q1 = 200 ma 1) load regulation ? v q1,lo ? 550mv5 ma < i q1 < 300 ma line regulation ? v q1,li ? 525mv i q1 = 5 ma; 6 v < v i < 28 v power supply ripple rejection psrr ? 65 ? db f r = 100 hz; v r = 1 vpp current consumption quiescent current; i q = i i - i q1 - i q2 i q ? 10 20 ma i q1 = 300 ma; i q2 = 500 a; v q1 and v q2 on quiescent current; i q = i i - i q1 - i q2 i q ? 250 500 a i q2 = i q1 = 500 a; v q1 and v q2 on inhibit input inh1 turn-on voltage v inh1 on ?? 2.3 v v q1 on turn-off voltage v inh1 off 0.7 ?? v v q1 off h-input current i inh1 on -1 3.5 5 a 3.0 v < v inh1 < 5 v; (see page 14 ) l-input current i inh1 off -1 0.1 1 a0 v < v inh1 < 0.8 v table 4 electrical characteristics (cont ? d) v i1 = 13.5 v; v inh1 = v inh2 = 5 v; -40 c < t j < 150 c; unless otherwise specified parameter symbol limit values unit test condition min. typ. max.
data sheet 12 rev. 1.2, 2004-01-01 tle 4473 gv55 reset timing d1 charge current i dc1 4.0 8.0 12.0 a v d1 = 1 v upper timing threshold v du1 1.61.82.2v ? lower timing threshold v dl2 0.30.40.6v ? saturation voltage v d1,sat ?? 100 mv v q1 < v rt1 reset delay time t rd1 14 20 30 ms c d1 = 100 nf reset reaction time t rr ?? 10 s c d1 = 100 nf reset output ro1 reset switching threshold v rt1 4.5 4.65 4.8 v ? v rt1 / v q1 90 93 96 % ? reset threshold headroom v r1head 200 350 500 mv v q1 - v rt1 reset output current i ro1 ?? 1.6 ma v q1 = 5.0 v; v q2 = 5.0 v; v d1 = 0 v; v ro1 = 0.3 v reset output low voltage v ro1l ? 0.15 0.3 v v q1 1 v reset output high voltage v ro1h 4.5 ?? v r ro1,ext = 4.7 k ? 1) drop voltage = v i - v q (measured when the output voltage has dropped 100 mv from the nominal value obtained at 13.5 v input) table 4 electrical characteristics (cont ? d) v i1 = 13.5 v; v inh1 = v inh2 = 5 v; -40 c < t j < 150 c; unless otherwise specified parameter symbol limit values unit test condition min. typ. max.
data sheet 13 rev. 1.2, 2004-01-01 tle 4473 gv55 typical performance characteristics output voltage v q2 versus input voltage v i reset thresholds v rt1 , v rt2 versus junction temperature t j output voltage v q2 versus junction temperature t j inh2 input current versus inhibit voltage aed03353.vsd 0 v i v q2 123456 v8 0 1 2 3 4 5 6 7 8 v r load = 50 ? v inh2 = 5 v aed03354.vsd -40 t j 0 40 80 c 160 v v rt1, v rt2 4.55 4.60 4.65 4.70 4.75 4.80 aed03352.vsd -40 t j 0 40 80 c 160 v v q2 4.90 4.95 5.00 5.05 5.10 5.15 aed03351.vsd 0 v inh2 i inh2 123456 v8 0 1 2 3 4 5 6 7 8 a
data sheet 14 rev. 1.2, 2004-01-01 tle 4473 gv55 inh1 input current versus inhibit voltage aed03350.vsd 0 v inh1 i inh1 123456 v8 0 1 2 3 4 5 6 7 8 a
tle 4473 gv55 data sheet 15 rev. 1.2, 2004-01-01 package outlines figure 4 p-dso-12-6 (plastic dual small outline) 16 7 12 0.8 (1.55) 2.35 ?.1 2.6 max. 0.1 ?.3 10.3 (4.4 mold) 4.2 ?.1 (1.8 mold) ?.1 1.6 index marking +0.13 0.4 1 5 x 1 = 5 c 0.25 m ab ?.1 5.1 6.4 a ?.1 7.5 b ?.1 7.8 ?.1 (heatslug) 0.25 b + 0 .0 7 5 0.25 - 0 .0 3 5 5? ?? 12x 1) +0.1 0 1) does not include plastic or metal protrusion of 0.15 max. per side 1) standoff (body) (mold) (metal) 712 1 6 (metal) (metal) heatslug gps09349 you can find all of our packages, sorts of packing and others in our infineon internet page ?roducts? http://www.infineon.com/products . dimensions in mm smd = surface mounted device
edition 2004-01-01 published by infineon technologies ag, st.-martin-strasse 53, 81669 mnchen, germany ? infineon technologies ag 2004. all rights reserved. attention please! the information herein is given to describe certain components and shall not be considered as a guarantee of characteristics. terms of delivery and rights to technical change reserved. we hereby disclaim any and all warranties, including but not limited to warranties of non-infringement, regarding circuits, descriptions and charts stated herein. information for further information on technology, delivery terms and conditions and prices please contact your nearest infineon technologies office ( www.infineon.com ). warnings due to technical requirements components may contain dangerous substances. for information on the types in question please contact your nearest infineon technologies office. infineon technologies components may only be used in life-support devices or systems with the express written approval of infineon technologies, if a failure of such components can reasonably be expected to cause the failure of that life-support device or system, or to affect the safety or effectiveness of that device or system. life support devices or systems are intended to be implanted in the human body, or to support and/or maintain and sustain and/or protect human life. if they fail, it is reasonable to assume that the health of the user or other persons may be endangered.

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